For instance, an epitaxial silicon wafer used for a power MOS transistor requires an extremely low substrate resistivity. In order to sufficiently lower a substrate resistivity of the silicon wafer, there has been known a technique of doping a molten silicon with arsenic (As) or antimony (Sb) as an n-type dopant for a resistivity adjustment in a pull-up step (i.e., during growth of a silicon crystal) of a monocrystalline ingot (hereinafter, referred to as a monocrystal) that is a base material of the silicon wafer (see, for instance, Patent Literature 1).
Patent Literature 1 discloses that occurrence of dislocation can be inhibited by manufacturing a monocrystal in a manner to have a crystal cone (i.e., a shoulder) with an apex angle from 40 degrees to 60 degrees.